The present disclosure relates generally to information handling systems, and more particularly to a testing system for a backplane used in an information handling system.
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems (IHSs). An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
As the speed at which IHSs operate and communicate increases, the need to design and build components that enable that speed of operation and communication arises. For example, current switches provide maximum port speeds (e.g., on a Quad Small Form-factor Pluggable (QSFP) port) of 40 GB/s, which may be enabled for each port by four individual Serializer/Deserializer (SerDes) links located on a backplane and each operating at 10 GB/s. However, when design begins to support switch components that can operate at a speed that is higher than current speeds, components that will enable that speed of operation must be designed and tested. Using the example above, to support a future switch that operates at a maximum port speed of 100 GB/s, a backplane that includes SerDes links each operating at 25 GB/s must be designed and tested. However, with current switch components limited to the current operation speeds, the testing of components that will enable the new, higher speeds that are desired in the future switches is complicated. Again using the example above, current line modules and route processing modules used with current switches are only designed to operate at 10 GB/s, and thus a speed test at 25 GB/s cannot be conducted on a 25 GB/s backplane design to confirm that future upgrades of switches to 25 GB/s will be enabled when line modules and route processing modules are designed that operate at that speed.
Conventionally, in order to test a new, higher speed backplane design for a new, higher speed switch when current switch components operate at current operation speeds, a Vector Network Analyzer (VNA) is typically used. A VNA is an expensive, specialized piece of equipment that requires a dedicated testing trace be included on a sample of the new backplane, and testing connectors added to the sample of the new backplane, to allow the VNA to be connected to the sample of the new backplane. The VNA then sends test signals (e.g., sine waves at different frequencies) through the dedicated testing trace and measures insertion loss and return loss. However, such conventional testing methods are time consuming to set up and run, making them unavailable for manufacturing floor test, and only provide for the testing of a sample of a backplane production run. Furthermore, these convention testing methods only test in the frequency domain, rather than the time domain in which the backplane is actually used. Further still, these conventional testing methods do not test actual channels in the backplane. Rather, they test only the dedicated testing trace, and thus localized defects in the backplane that are not in the same area as the dedicated testing trace will not be detected. Finally, these conventional testing methods are relatively expensive. For example, a 50 GHz VNA needed to test for 25 GB/s speeds in a backplane currently costs over $200,000 USD.
Accordingly, it would be desirable to provide an improved backplane testing system.